1. Field of the Invention
The present invention generally relates to a counter circuit. More particularly, it relates to a counter circuit which uses a plurality of counter circuits so as to be used in all products employing a counter circuit in a semiconductor device, and thereby performs a multi-bit linear burst sequence operation.
2. Description of the Conventional Art
FIG. 1 shows a conventional counter circuit. The conventional counter circuit generates a clock synchronizing sign 1 CNT_CLOCK for synchronizing a counting operation. The low level bit counter and high level bit counter are responsive to the clock synchronizing signal CNT_CLOCK changing from a low level signal L to a high level signal H, or from a high level signal H to a low level signal L. The low order bit counter generates a first output signal OUT0 which is high(H).fwdarw.low(L).fwdarw.high (H).fwdarw.low(L). The high order bit counter responds to the output signal of the low order bit counter and then generates a second output signal OUT1 being low(L).fwdarw.low(L).fwdarw.high(H).fwdarw.high(H).fwdarw.low(L).fwdarw.lo w(L).fwdarw.high(H).fwdarw.high(H).
The conventional counter circuit does not receive an input signal (e.g., address, etc.) that functions as a base signal in a linear burst sequence operation. Accordingly, the conventional counter circuit cannot make an output signal according to the linear burst operation based on the input signal, and thus cannot be used in a device having the linear burst sequence operation.